Digital Signal Processing Algorithm Optimization for Vliw Digital Signal Processors (invited)

Digital signal processors with Harvard architecture are being gradually replaced by digital signal processors with VLIW (Very Long Instruction Word) architecture for high-end applications. Owing to exploiting the principles of parallel instruction processing and parallel data processing, the new architecture provides the calculation power to implement complex algorithms of digital signal processing. On the other hand, it is very difficult to write programs such that they make optimum use of architecture properties. The paper summarizes the present authors’ experience obtained in optimum design of algorithms for digital signal processors with VLIW architecture. Using this new approach it was, for example, possible to optimize compilation from the C language into the assembler of TMS320C6414 (Texas Instruments) digital signal processor for type GSM encoder [7] and to speed up the processing about 25 times. The method consists in a closer linkage between the theory of digital signal processing, software tools and hardware.